Traditionally Windows can determine if a whole chip has HT or not, but we will be interested to see if it can determine which of my threads on a 10C/15T setup are hyperthreads or not.Īlso for overclocking, Intel has enabled in the specification new segmentation and timers to allow users to overclock both the PCIe bus between CPU and add-in cards as well as the DMI bus between the CPU and the chipset. That being said, an open question exists as to whether the operating system is set up to identify if individual cores have hyperthreads or not. This is an interesting exercise mostly aimed at extreme overclockers that might have single cores that perform better than others, and want to disable HT on that specific core. As a result, users with 10 cores could disable HT on half the cores, for whatever reason. Overclocking Tools and Overclocking Warrantiesįor this generation, Intel is set to offer several new overclocking features.įirst up is allowing users to enable/disable hyperthreading on a per-core basis, rather than a whole processor binary selection. We did ask how much the die is thinned by, however the presenter misunderstood the question as one of volume (?). During our briefing, Intel didn’t mention if all the new processors use STIM, or just the overclockable ones, and neither did Intel state if die thinning was used on non-STIM products. In this slide, Intel suggests that they apply die thinning to products using STIM, or a soldered thermal interface. This means that the smallest transistor features are nearest the cooling, however depending on the thickness of the wafer means that there is potential, with polishing to slowly remove silicon from this ‘rear-end’ of the chip. Because modern processors are ‘flip-chips’, the bonding pads are made at the top of the processor during manufacturing, then the chip is flipped onto the substrate. One of the new features that Intel is promoting with the new Comet Lake processors is die thinning – taking layers off of the silicon and in response making the integrated heat spreader thicker in order to enable better thermal transfer between silicon and the cooling. Intel is now claiming that V4 is fixed through a combination of hardware and OS fixes. The fix for V3a has now changed from ‘Firmware’ to ‘MCU’, suggesting that Intel has added a microcontroller as a fix. There's even a possibility that Intel could be reusing the same Coffee Lake silicon masks and just binning them to Comet Lake specifications.įor security, Intel is applying the same modifications it had made to Coffee Lake, matching up with the Cascade Lake and Whiskey Lake designs. We have reached out to Intel for clarification, given that in previous generations Intel sometimes offered different TDP values for the harvested dies. Similarly, the six core Core i5 could either be native 6C silicon, harvested 8C silicon, or harvested 10C silicon. Beyond that, Intel could make any of the eight core Core i7 parts use either a native 8C silicon, or 10C silicon with two disabled cores. The only silicon we know to be guaranteed inside each retail box is that the ten core parts have to have the 10C silicon. Original 7700K/8700K die shots from Videocardz The die size for this chip should be in the region of ~200 mm2, based on previous extensions of the standard quad core die: This should have a negligible effect on core-to-core latency which will likely not be noticed by end-users. Intel have added two cores and extended the communication ring between the cores. It looks very much like an elongated Comet Lake chip, which it is. Also as part of the launch, Intel provided us with a die shot: This is despite the socket being the same size. The new CPUs have the LGA1200 socket, which means that current 300-series motherboards are not sufficient, and users will require new LGA1200 motherboards.
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